It was known that El Capitan would use the Zen 4 and a new generation of AMD Instinct. Now it is certain: it will be the HPC-APU Instinct Mi300 based on Zen 4 and cDNA 3. The supercomputer, which will also simulate nuclear weapons, is to be built from next year and will be launched in the first half of 2024.
Even more performance through more power?
Exact specifications for the system are still not available, but two years after the first bits of information, some parameters were announced or re-confirmed. The following also applies: more than 2 ExaFLOPS FP64 performance should be achieved, i.e. almost twice (or possibly more later) current Frontier designs.
In March 2020, although the maximum 30 MW was in discussion, but today the makers are calling up to 40 MW, which should not be broken. Frontier scored 1.1 exaflops at 21.1 megawatts. At this point, the makers of the next supercomputer are likely to be overwhelmed before the final hardware is available, as otherwise the increase in performance and power consumption would be nearly linear. However, this can hardly be the target of the next generation solution and therefore should probably be surpassed in the end in terms of efficiency.
1:4. with AMD’s “HPC-APU” instead of CPU to GPU ratio
Two years ago, AMD saidThat would be coupled to four GPUs and one Epyc CPU per node. In addition, AMD said at the time that the third generation of the Infinity Architecture would be used, with completion in early 2023. But the schedule is history, and so is the hardware — at least in part.
Delivery and usage delays from Q2/2024 apparently also allow for new hardware and the previous information is out of date.
Because the AMD Instinct MI300 is already based on the fourth generation Infinity architecture, not the previously advertised third generation which includes stacking – that is, not only connected in layer, but also chips stacked on a package.
AMD has officially announced a socketed APU on this basis under the Instinct MI300 brand, consisting of a Zen 4 CPU and a cDNA 3 GPU, which can access a shared HBM3 memory (integrated memory). The CPU and GPU are housed on an infinity cache on the package. It is not yet known how many cores CPU or how many GPU tiles are in the GPU. The fact that the APU can be socketed makes integration across nodes easier.
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